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check22TikcppDataCopyPadCheck14CheckAddrAlignEv_ZN7AscendC5check22TikcppDataCopyPadCheckD2Ev_ZN7AscendC5check22TikcppDataCopyPadCheckD1Ev_ZN7AscendC5check22TikcppDataCopyPadCheckD0Ev_ZN7AscendC5check22TikcppDataCopyPadCheck17CheckPadParamtersERKSs_ZTSN7AscendC5check22TikcppDataCopyPadCheckE_ZTIN7AscendC5check22TikcppDataCopyPadCheckE_ZN7AscendC5check24TikcppDataCopySliceCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppDataCopySliceCheckD2Ev_ZN7AscendC5check24TikcppDataCopySliceCheckD1Ev_ZN7AscendC5check24TikcppDataCopySliceCheckD0Ev_ZN7AscendC5check24TikcppDataCopySliceCheck23CheckSliceInfoParamtersERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck25DataCopyGetTotalInstrsNumEPKNS_9SliceInfoEPKj_ZN7AscendC5check24TikcppDataCopySliceCheck27CheckDataCopyIntrsParamtersERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck22CheckDataCopyInstrsNumERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck14CheckAddrAlignEv_ZTSN7AscendC5check24TikcppDataCopySliceCheckE_ZTIN7AscendC5check24TikcppDataCopySliceCheckE_ZN7AscendC5check21TikcppLoaddata2dCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check23TikcppLoaddata3dv1Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check23TikcppLoaddata3dv2Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check26TikcppLoaddata3dv2ProCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppLoadImageToL1Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppLoadImageToL1CheckD2Ev_ZN7AscendC5check24TikcppLoadImageToL1CheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD2Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD1Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD2Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD1Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD2Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD2Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD0Ev_ZN7AscendC5check24TikcppLoadImageToL1CheckD0Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD0Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD0Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD0Ev_ZTSN7AscendC5check21TikcppLoaddata2dCheckE_ZTIN7AscendC5check21TikcppLoaddata2dCheckE_ZTSN7AscendC5check23TikcppLoaddata3dv1CheckE_ZTIN7AscendC5check23TikcppLoaddata3dv1CheckE_ZTSN7AscendC5check23TikcppLoaddata3dv2CheckE_ZTIN7AscendC5check23TikcppLoaddata3dv2CheckE_ZTSN7AscendC5check26TikcppLoaddata3dv2ProCheckE_ZTIN7AscendC5check26TikcppLoaddata3dv2ProCheckE_ZTSN7AscendC5check24TikcppLoadImageToL1CheckE_ZTIN7AscendC5check24TikcppLoadImageToL1CheckE_ZN7AscendC5check15TikcppMmadCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check15TikcppMmadCheckD2Ev_ZN7AscendC5check15TikcppMmadCheckD1Ev_ZN7AscendC5check15TikcppMmadCheckD0Ev_ZNK7AscendC5check15TikcppMmadCheck20CheckMmadParamsRangeEjRKSs_ZN7AscendC5check15TikcppMmadCheck17CheckMmadOverflowERKSs_ZTSN7AscendC5check15TikcppMmadCheckE_ZTIN7AscendC5check15TikcppMmadCheckE_ZN7AscendC5check20TikcppVecBinaryCheckD2Ev_ZN7AscendC5check20TikcppVecBinaryCheckD1Ev_ZN7AscendC5check20TikcppVecBinaryCheckD0Ev_ZN7AscendC5check20TikcppVecBinaryCheck14CheckAddrAlignEv_ZTSN7AscendC5check20TikcppVecBinaryCheckE_ZTIN7AscendC5check20TikcppVecBinaryCheckE_ZN7AscendC5check26TikcppVecBinaryScalarCheckD2Ev_ZN7AscendC5check26TikcppVecBinaryScalarCheckD1Ev_ZN7AscendC5check26TikcppVecBinaryScalarCheckD0Ev_ZN7AscendC10Int4Setter8InstanceEv_ZTSN7AscendC5check26TikcppVecBinaryScalarCheckE_ZTIN7AscendC5check26TikcppVecBinaryScalarCheckE_ZN7AscendC5check23TikcppVecBroadCastCheck17CheckAllHighLevelEv_ZN7AscendC5check23TikcppVecBroadCastCheckD2Ev_ZN7AscendC5check23TikcppVecBroadCastCheckD1Ev_ZN7AscendC5check23TikcppVecBroadCastCheckD0Ev_ZN7AscendC5check23TikcppVecBroadCastCheck22CheckSrcTensorOverflowERKSs_ZTSN7AscendC5check23TikcppVecBroadCastCheckE_ZTIN7AscendC5check23TikcppVecBroadCastCheckE_ZN7AscendC5check24TikcppBroadCastToMMCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppBroadCastToMMCheckD2Ev_ZN7AscendC5check24TikcppBroadCastToMMCheckD1Ev_ZN7AscendC5check24TikcppBroadCastToMMCheckD0Ev_ZTSN7AscendC5check24TikcppBroadCastToMMCheckE_ZTIN7AscendC5check24TikcppBroadCastToMMCheckE_ZN7AscendC5check27TikcppVecCompareScalarCheckD2Ev_ZN7AscendC5check27TikcppVecCompareScalarCheckD1Ev_ZN7AscendC5check27TikcppVecCompareScalarCheckD0Ev_ZN7AscendC5check27TikcppVecCompareScalarCheck14CheckAddrAlignEv_ZTSN7AscendC5check27TikcppVecCompareScalarCheckE_ZTIN7AscendC5check27TikcppVecCompareScalarCheckE_ZN7AscendC5check17TikcppVecDupCheckD2Ev_ZN7AscendC5check17TikcppVecDupCheckD1Ev_ZN7AscendC5check17TikcppVecDupCheckD0Ev_ZTSN7AscendC5check17TikcppVecDupCheckE_ZTIN7AscendC5check17TikcppVecDupCheckE_ZN7AscendC5check20TikcppVecGatherCheck17CheckAllHighLevelEv_ZN7AscendC5check20TikcppVecGatherCheckD2Ev_ZN7AscendC5check20TikcppVecGatherCheckD1Ev_ZN7AscendC5check20TikcppVecGatherCheckD0Ev_ZN7AscendC5check20TikcppVecGatherCheck25CheckOffsetTensorOverflowERKSs_ZTSN7AscendC5check20TikcppVecGatherCheckE_ZTIN7AscendC5check20Tikcp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void[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cbuf__ %s*)dst, (__gm__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu, padMode=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__gm__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cbuf__ %s*)dst, (__ubuf__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ %s*)dst, (__ubuf__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__cc__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu, crMode=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)dst, (__ubuf__ %s*)src, sid=%hhu, nBurst=%hu, lenBurst=%hu, srcStride=%hu, dstStride=%hu, crMode=%hhu); VSCDPL0AL0BL0CL0C16UBL0C32UBUBL0C16UBL0C32L1L0C16L1L0C32L0CV16UBL0CV32UBUBL0CV16UBL0CV32L0CSC32UBUBL0CSC32L0CDPf16UBL0CDPf32UBL1BTL1FBset_atomic_noneset_atomic_noneset_atomic_f32set_atomic_f32set_atomic_f16set_atomic_f16set_atomic_s16set_atomic_s16basic_string::basic_stringbasic_string::substrCTRLkernel_operator_set_atomic_add_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s(); set_atomic_noneset_atomic_f32set_atomic_f16set_atomic_s16G3_p0TensorWriteFileset_fmatrixset_deqscaleset_deqscaleset_lrelu_alphaset_lrelu_alphaset_vector_maskset_mask_countset_mask_normget_condget_condition_flagget_ctrlset_ctrlget_vms4_srget_rsvd_cntget_arget_acc_valget_st_atomic_cfgget_max_min_cntget_cmpmaskset_cmpmaskset_l1_3d_sizetrappipe_barrierget_arch_verget_pcdc_preloaddc_preloadpreloadpreloadpreloadpreloadset_data_exp_0set_data_exp_1set_data_exp_2set_data_exp_3std::string AscendC::FormatEvent(int32_t)wait_flagset_flagset_flagwait_flagset_condset_condition_flagset_st_atomic_cfg%d%f%ld%lukernel_utils.cpp[%s:%d] block_idx: %d, core_type: %s %d %s:%serror: file name is empty [%s:%d] block_idx: %d, core_type: %s %d %s: warn: realpath return nullptr [%s:%d] block_idx: %d, core_type: %s %d %s: WriteFile(): file name = '%s', size = %d [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: buffer is nullptr [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: can't open file: %s [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: write size %d [%s:%d] block_idx: %d, core_type: %s %d %s: set_fmatrix(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_deqscale((half)%f); [%s:%d] block_idx: %d, core_type: %s %d %s: set_deqscale(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_lrelu_alpha(%f); [%s:%d] block_idx: %d, core_type: %s %d %s: set_vector_mask(%lu, %lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_mask_count(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_mask_norm(); COND[%s:%d] block_idx: %d, core_type: %s %d %s: set_cond(); CONDITION_FLAG[%s:%d] block_idx: %d, core_type: %s %d %s: get_condition_flag(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_ctrl(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_ctrl(%lu); VMS4_SR[%s:%d] block_idx: %d, core_type: %s %d %s: get_vms4_sr(); RSVD_CNT[%s:%d] block_idx: %d, core_type: %s %d %s: get_rsvd_cnt(); AR[%s:%d] block_idx: %d, core_type: %s %d %s: get_ar(); ACC_VAL[%s:%d] block_idx: %d, core_type: %s %d %s: get_acc_val(); ST_ATOMIC_CFG[%s:%d] block_idx: %d, core_type: %s %d %s: get_st_atomic_cfg(); MAX_MIN_CNT[%s:%d] block_idx: %d, core_type: %s %d %s: get_max_min_cnt(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_cmpmask((__ubuf__ void* )dst=%p); [maskLow=%lu, maskHigh=%lu] [%s:%d] block_idx: %d, core_type: %s %d %s: set_cmpmask((__ubuf__ void* )src=%p); [maskLow=%lu, maskHigh=%lu] [%s:%d] block_idx: %d, core_type: %s %d %s: set_l1_3d_size(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: trap(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_V); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_ALL); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_S); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_M); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE1); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE2); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE3); ARCH_VER[%s:%d] block_idx: %d, core_type: %s %d %s: get_arch_ver(); PC[%s:%d] block_idx: %d, core_type: %s %d %s: get_pc(); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ uint64_t*)address, offset=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)addr, prefetchLen=%I64d); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)addr); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_0(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_1(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_2(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_3(%lu); PIPE_VPIPE_MPIPE_MTE1PIPE_MTE2PIPE_MTE3PIPE_S0[%s:%d] block_idx: %d, core_type: %s %d %s: wait_flag(%s, %s, %d); [%s:%d] block_idx: %d, core_type: %s %d %s: set_flag(%s, %s, %d); STATUS[%s:%d] block_idx: %d, core_type: %s %d %s: set_condition_flag(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_st_atomic_cfg(); uint64_t AscendC::check::CalculateVectorMaxOffset(uint64_t, uint64_t, uint64_t, uint64_t, uint64_t)bool AscendC::check::TikcppBaseCheck::CheckTensorOverflowLow(std::vector&, uint64_t, uint32_t, std::vector&, const string&) constbool AscendC::check::CheckOverlapSingleMany(std::vector&, std::vector&, std::vector&, const string&)[ERROR]%s: mask value is not in range [%lu, %lu] tikcpp_base_check.cpp[%s:%d]%s: mask value is not in range [%lu, %lu] [ERROR]%s: dst/src bit length is 32, mask_h must be 0 [%s:%d]%s: dst/src bit length is 32, mask_h must be 0 [ERROR]%s: dst/src bit length is 64, mask_h must be 0 [%s:%d]%s: dst/src bit length is 64, mask_h must be 0 vector::_M_realloc_insert[ERROR]%s [%s:%d]%s [ERROR]%s, addr0: %lu, addr1: %lu, needSize: %lu [%s:%d]%s, addr0: %lu, addr1: %lu, needSize: %lu [ERROR]%s, src hardware address: %lu, dst hardware address: %lu [%s:%d]%s, src hardware address: %lu, dst hardware address: %lu [ERROR]%s, src hardware address: %lu, dst hardware address: %lu, needSize: %lu [%s:%d]%s, src hardware address: %lu, dst hardware address: %lu, needSize: %lu [ERROR]%s, Need size: %lu, while tensor size is %lu [%s:%d]%s, Need size: %lu, while tensor size is %lu [ERROR]%s, Allocated buffer size overflow, allocate buffer size is %lu, the limit size is %lu. [%s:%d]%s, Allocated buffer size overflow, allocate buffer size is %lu, the limit size is %lu. blockLen != 0dtypeBytes != 0dtypeBytes[0] != 0dtypeBytes[1] != 0GMBIASFIXBUF[ERROR]the tensorPos/expectPos hardware pos not found,tensorPos index is %hhu, expectedPos is %hhu. [%s:%d]the tensorPos/expectPos hardware pos not found,tensorPos index is %hhu, expectedPos is %hhu. [ERROR]%s, the tensor hardware pos is %s, the expect pos is %s. [%s:%d]%s, the tensor hardware pos is %s, the expect pos is %s. N7AscendC5check15TikcppBaseCheckE[ERROR]intriName is null.tikcpp_check_util.cpp[%s:%d]intriName is null. N7AscendC5check15TikcppCopyCheckE[ERROR]maskArray size is zero.tikcpp_copy_check.cpp[%s:%d]maskArray size is zero. check dst tensor position failedcheck src tensor position failedcheck dst tensor buffersize failedcheck src tensor buffersize faileddst and src address overlappingdst calculate size overflowsrc calculate size overflowN7AscendC5check19TikcppDataCopyCheckE    GetHardwareBaseAddrCore_tikcpp_data_copy_check.cpp[ERROR][%s][%s:%d][%s][%u] illegal hardPos %d [ERROR]instr %s src addr is %lu, which should be %u B Aligned [%s:%d]instr %s src addr is %lu, which should be %u B Aligned [ERROR]instr %s dst addr is %lu, which should be %u B Aligned [%s:%d]instr %s dst addr is %lu, which should be %u B Aligned N7AscendC5check22TikcppDataCopyPadCheckE[ERROR]%s, size of leftPadding or rightpadding should be less than 32 Bytes tikcpp_data_copy_pad_check.cpp[%s:%d]%s, size of leftPadding or rightpadding should be less than 32 Bytes check dataCopyPad paramtersN7AscendC5check24TikcppDataCopySliceCheckE    GetHardwareBaseAddr[ERROR]%s, dstSliceInfo[%u]'s busrt len (%u) should be equal to SliceInfo[%u]'s busrt len (%u) tikcpp_data_copy_slice_check.cpp[%s:%d]%s, dstSliceInfo[%u]'s busrt len (%u) should be equal to SliceInfo[%u]'s busrt len (%u) [ERROR]%s, dim[%u]'s dstSliceInfo's busrt len should be equal to 1, but get (%u) [%s:%d]%s, dim[%u]'s dstSliceInfo's busrt len should be equal to 1, but get (%u) [ERROR]%s, dstSliceInfo[%u]'s start index (%u) should be lee than dstSliceInfo[%u]'s end index (%u) [%s:%d]%s, dstSliceInfo[%u]'s start index (%u) should be lee than dstSliceInfo[%u]'s end index (%u) [ERROR]%s, dstSliceInfo[%u]'s end index (%u) should be less than dstSliceInfo[%u]'s shape (%u) [%s:%d]%s, dstSliceInfo[%u]'s end index (%u) should be less than dstSliceInfo[%u]'s shape (%u) [ERROR]%s, srcSliceInfo[%u]'s start index (%u) should be lee than srcSliceInfo[%u]'s end index (%u) [%s:%d]%s, srcSliceInfo[%u]'s start index (%u) should be lee than srcSliceInfo[%u]'s end index (%u) [ERROR]%s, srcSliceInfo[%u]'s end index (%u) should be less than dst tensor dim[%u]'s shape (%u) [%s:%d]%s, srcSliceInfo[%u]'s end index (%u) should be less than dst tensor dim[%u]'s shape (%u) [ERROR]%s, construct datacopy intrs paramters block count failed, please check srcSliceInfo[0].burstLen(%u), srcSliceInfo[0].startIndex(%u), srcSliceInfo[0].endIndex(%u), srcSliceInfo[0].stride(%u) [%s:%d]%s, construct datacopy intrs paramters block count failed, please check srcSliceInfo[0].burstLen(%u), srcSliceInfo[0].startIndex(%u), srcSliceInfo[0].endIndex(%u), srcSliceInfo[0].stride(%u) [ERROR]%s, one dst stride len (%lu) should be multiple of block size (%lu), dstSliceInfo[0].stride(%u), dstDtypeBytes(%u) [%s:%d]%s, one dst stride len (%lu) should be multiple of block size (%lu), dstSliceInfo[0].stride(%u), dstDtypeBytes(%u) [ERROR]%s, one src stride len (%lu) should be multiple of block size (%lu), srcSliceInfo[0].stride(%u), srcDtypeBytes(%u) [%s:%d]%s, one src stride len (%lu) should be multiple of block size (%lu), srcSliceInfo[0].stride(%u), srcDtypeBytes(%u) [ERROR]%s, srcIntrsNum(%u) != dstIntrsNum(%u) [%s:%d]%s, srcIntrsNum(%u) != dstIntrsNum(%u) [ERROR]%s, srcIntrsNum(%u) is bigger than MAX_SLICE_SIZE(%u), please reset the sliceInfo parameter [%s:%d]%s, srcIntrsNum(%u) is bigger than MAX_SLICE_SIZE(%u), please reset the sliceInfo parameter check dst tensor position failed, it should be UBcheck total number of instructions mov or mov_align failedcheck src tensor position failed, it should be UBcheck ub tensor buffersize failedcheck sliceInfo paramterscheck data copy instr paramtersN7AscendC5check21TikcppLoaddata2dCheckEN7AscendC5check23TikcppLoaddata3dv1CheckEN7AscendC5check23TikcppLoaddata3dv2CheckEN7AscendC5check26TikcppLoaddata3dv2ProCheckEN7AscendC5check24TikcppLoadImageToL1CheckE[ERROR]check dst tensor position failed,the dst hardware pos support L1.tikcpp_loaddata_check.cpp[%s:%d]check dst tensor position failed,the dst hardware pos support L1. [ERROR]dst dtype bytes is zeros[%s:%d]dst dtype bytes is zeros [ERROR]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B or UB.[%s:%d]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B or UB. [ERROR]check src tensor position failed,the src hardware pos only support L1.[%s:%d]check src tensor position failed,the src hardware pos only support L1. [ERROR]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B.[%s:%d]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B. [ERROR]check dst tensor position failed,the src hardware pos is GM, the dst hardware pos support L1 or L0A or L0B.[%s:%d]check dst tensor position failed,the src hardware pos is GM, the dst hardware pos support L1 or L0A or L0B. [ERROR]src/dst dtype bytes is zeros[%s:%d]src/dst dtype bytes is zeros [ERROR]check src tensor position failed,the src hardware pos support L1 or GM.[%s:%d]check src tensor position failed,the src hardware pos support L1 or GM. [ERROR]check src tensor position failed,the src hardware pos support L1.[%s:%d]check src tensor position failed,the src hardware pos support L1. N7AscendC5check15TikcppMmadCheckE[ERROR]%s: value(%u) is not in range [%u, %u] tikcpp_mmad_check.cpp[%s:%d]%s: value(%u) is not in range [%u, %u] [ERROR]%s: needElementL0c(%u) is bigger than totalL0CSize(%u) [%s:%d]%s: needElementL0c(%u) is bigger than totalL0CSize(%u) [ERROR]%s: needElementL0b(%u) + needElementL0a(%u) is bigger than totalL1Size(%u) [%s:%d]%s: needElementL0b(%u) + needElementL0a(%u) is bigger than totalL1Size(%u) check src0 tensor position failedcheck src1 tensor position failedcheck MmadParams'm range failedcheck MmadParams'n range failedcheck MmadParams'k range failedcheck mmad overflow failedN7AscendC5check20TikcppVecBinaryCheckE    GetHardwareBaseAddrtikcpp_vec_binary_check.cppcheck src0 tensor buffersize failedcheck src1 tensor buffersize failedvcmpvdst and src0 address overlappingdst and src1 address overlappingsrc0 calculate size overflowsrc1 calculate size overflow[ERROR]instr %s dst addr is %lu, which should be 32B Aligned [%s:%d]instr %s dst addr is %lu, which should be 32B Aligned [ERROR]instr %s src0 addr is %lu, which should be 32B Aligned [%s:%d]instr %s src0 addr is %lu, which should be 32B Aligned [ERROR]instr %s src1 addr is %lu, which should be 32B Aligned [%s:%d]instr %s src1 addr is %lu, which should be 32B Aligned N7AscendC5check26TikcppVecBinaryScalarCheckE    GetHardwareBaseAddrtikcpp_vec_binary_scalar_check.cppN7AscendC5check23TikcppVecBroadCastCheckE[ERROR]src dtype bytes is zerostikcpp_vec_broadcast_check.cpp[%s:%d]src dtype bytes is zeros N7AscendC5check24TikcppBroadCastToMMCheckEN7AscendC5check27TikcppVecCompareScalarCheckE    GetHardwareBaseAddrtikcpp_vec_compare_scalar_check.cppN7AscendC5check17TikcppVecDupCheckEtikcpp_vec_dup_check.cppN7AscendC5check20TikcppVecGatherCheckE[ERROR]offset dtype bytes is zerostikcpp_vec_gather_check.cpp[%s:%d]offset dtype bytes is zeros check offset tensor position failedcheck offset tensor buffersize failedoffset calculate size overflowN7AscendC5check21TikcppGatherMaskCheckEtikcpp_vec_gather_mask_check.cppN7AscendC5check22TikcppVecProposalCheckEsrc calculate size overflow[ERROR]valid bit number overflow 4.tikcpp_vec_proposal_check.cpp[%s:%d]valid bit number overflow 4. [ERROR]src index overflow element size.[%s:%d]src index overflow element size. vbs32vconcatvextractvbs16vms4vms4v2N7AscendC5check20TikcppVecReduceCheckE[ERROR]byteLen is %u, it shoule be greater than 0 tikcpp_vec_reduce_check.cpp[%s:%d]byteLen is %u, it shoule be greater than 0 [ERROR]%s, Reduce need dst data type (%u),dst src type (%u), dst wokr type (%u) should be same [%s:%d]%s, Reduce need dst data type (%u),dst src type (%u), dst wokr type (%u) should be same [ERROR]%s, Worktensor's size should be more than %lu, but get %lu [%s:%d]%s, Worktensor's size should be more than %lu, but get %lu [ERROR]dtype bytes is zeros[%s:%d]dtype bytes is zeros [ERROR]%s, elementNumPerRep can not be 0. [%s:%d]%s, elementNumPerRep can not be 0. [ERROR]%s, Need least output size: %lu, while tensor size is %lu [%s:%d]%s, Need least output size: %lu, while tensor size is %lu Check Reduce data typeCheck Reduce dst data sizecheck interface level 0 dst tensor position failedcheck interface level 0 src tensor position failedcheck interface level 0 work tensor position failedcheck work tensor buffersize failedvreduce_sumCheck Reduce sum workLocal tensor sizevreduce_maxCheck Reduce max workLocal tensor sizeCheck Reduce min workLocal tensor sizecheck interface level 2 dst tensor position failedcheck interface level 2 src tensor position failedcheck interface level 2 work tensor position failedCheck Reduce Sum workLocal tensor sizeN7AscendC5check25TikcppVecReduceOtherCheckE[ERROR]%s, Reduce need dst data type (%u),dst src type (%u), should be same tikcpp_vec_reduce_other_check.cpp[%s:%d]%s, Reduce need dst data type (%u),dst src type (%u), should be same [ERROR]%s, srcSize is: %lu, output size: %lu, while dst tensor size should be half of src tensor size [%s:%d]%s, srcSize is: %lu, output size: %lu, while dst tensor size should be half of src tensor size vcmaxvcminvcaddvcgaddCheck Whole Reduce data typeCheck Whole Reduce dst data sizevcgmaxvcgminvcpaddCheck Block Reduce dst data sizeCheck Pair Reduce dst data sizeN7AscendC5check23TikcppVecTransposeCheckEvoid AscendC::ModelFactory::SetVARegGmAddr(uint32_t, uint64_t*)void AscendC::ModelFactory::GetVARegGmAddr(uint32_t, uint64_t (&)[8])void AscendC::ModelFactory::SetVARegUbAddr(uint32_t, uint64_t*)void AscendC::ModelFactory::GetVARegUbAddr(uint32_t, uint64_t (&)[8])SetGPRRegistersSetSPRRegistersSetInputRunGetOutputuint64_t AscendC::ModelFactory::GetVectorExtent(uint16_t, uint16_t, uint16_t, uint16_t, uint16_t) constGetVectorExtentvoid AscendC::ModelFactory::Init()tik_pv_factory.cppvaIndex < VA_REG_NUM[%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_gpr_register X(%ld) error, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_spr_register %s error, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_memory error, mem_addr: %lu, mem_scope: %d, src_addr: %p, src_len: %lu, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_step error, instr_value: %u, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_read_memory error, mem_addr: %lu, mem_scope: %u, dst_addr: %p, dst_len: %lu, code: %d blockNum != 0[%s:%d] block_idx: %d, core_type: %s %d %s: maskLow_=%lu, maskHigh_=%lu, maskLen=%hu, blkNumLastRep=%hu, eleNumLastBlk=%hu, maxOffset=%lu [%s:%d] block_idx: %d, core_type: %s %d %s: maskLow_=%lu, maskHigh_=%lu, counterElements=%hu, inferredRepeatTimes=%hu, blkNumLastRep=%hu, eleNumLastBlk=%hu, maxOffset=%lu ./simlog/model_ != nullptrdccidccikernel_operator_fixpipe_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)dst, entire=%hu); void AscendC::CheckLoad2dParam(const AscendC::LoadData2DParams&)void AscendC::CheckLoadImageToL1Params(const AscendC::LoadImageToL1Params&)void AscendC::CheckBroadCastParam(uint8_t, uint8_t)set_paddingset_paddingset_paddingset_paddingset_paddingset_paddingset_l3d_rptset_paddingset_paddingvoid AscendC::Load2dv1PvImpl(void*, void*, const AscendC::UnaryPvParams&, const AscendC::LoadData2DParams&)broadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cbload_cbuf_to_cbload_gm_to_caload_gm_to_caload_gm_to_cbload_gm_to_cbload_gm_to_cbufload_gm_to_cbufload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cbload_cbuf_to_cbload_gm_to_caload_gm_to_caload_gm_to_cbload_gm_to_cbload_gm_to_cbufload_gm_to_cbufload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cbload_cbuf_to_cbload_gm_to_caload_gm_to_caload_gm_to_cbload_gm_to_cbload_gm_to_cbufload_gm_to_cbufload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cbload_cbuf_to_cbload_gm_to_caload_gm_to_caload_gm_to_cbload_gm_to_cbload_gm_to_cbufload_gm_to_cbufload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cbload_cbuf_to_cbload_gm_to_caload_gm_to_caload_gm_to_cbload_gm_to_cbload_gm_to_cbufload_gm_to_cbufmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadvoid AscendC::CreateCaCbL1MatrixPv(AscendC::Hardware, L0_T*, int64_t, S_T) [with L0_T = void; S_T = float16::Fp16T; int64_t = long int]create_ca_matrixcreate_ca_matrixcreate_cb_matrixcreate_cb_matrixcreate_cbuf_matrixcreate_cbuf_matrixvoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = unsigned char]img2col_cbuf_to_caimg2col_cbuf_to_caimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_ubimg2col_cbuf_to_ubvoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = signed char]img2col_cbuf_to_caimg2col_cbuf_to_caimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_ubimg2col_cbuf_to_ubvoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = float16::Fp16T]img2col_cbuf_to_caimg2col_cbuf_to_caimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_ubimg2col_cbuf_to_ubvoid AscendC::CheckLoad3dV2Param(const AscendC::LoadData3DParamsV2&) [with T = unsigned char]void AscendC::Load3DV2Pv(T*, T*, AscendC::Hardware, AscendC::Hardware, const AscendC::LoadData3DParamsV2&) [with T = unsigned char]img2colv2_cbuf_to_caimg2colv2_cbuf_to_caimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_ubimg2colv2_cbuf_to_ubvoid AscendC::CheckLoad3dV2Param(const AscendC::LoadData3DParamsV2&) [with T = signed char]void AscendC::Load3DV2Pv(T*, T*, AscendC::Hardware, AscendC::Hardware, const AscendC::LoadData3DParamsV2&) [with T = signed char]img2colv2_cbuf_to_caimg2colv2_cbuf_to_caimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_ubimg2colv2_cbuf_to_ubvoid AscendC::CheckLoad3dV2Param(const AscendC::LoadData3DParamsV2&) [with T = float16::Fp16T]void AscendC::Load3DV2Pv(T*, T*, AscendC::Hardware, AscendC::Hardware, const AscendC::LoadData3DParamsV2&) [with T = float16::Fp16T]img2colv2_cbuf_to_caimg2colv2_cbuf_to_caimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_cbimg2colv2_cbuf_to_ubimg2colv2_cbuf_to_ubl1W > 0l1H > 0MAX_LOAD3D_L1 >= intriParams.l1HintriParams.l1H >= MIN_LOAD3D_L1MAX_LOAD3D_L1 >= intriParams.l1WintriParams.l1W >= MIN_LOAD3D_L1MAX_LOAD3D_C1_IDX >= intriParams.c1IndexintriParams.leftTopW >= MIN_LOAD3D_LEFT_TOPintriParams.leftTopH >= MIN_LOAD3D_LEFT_TOPMAX_LOAD3D_STRIDE >= intriParams.strideWintriParams.strideW >= MIN_LOAD3D_STRIDEMAX_LOAD3D_STRIDE >= intriParams.strideHintriParams.strideH >= MIN_LOAD3D_STRIDEintriParams.filterW >= MIN_LOAD3D_FILTERintriParams.filterH >= MIN_LOAD3D_FILTERintriParams.dilationFilterW >= MIN_LOAD3D_DILATION_FILTERintriParams.dilationFilterH >= MIN_LOAD3D_DILATION_FILTERMAX_LOAD3D_JUMP_STRIDE >= intriParams.jumpStrideintriParams.jumpStride >= MIN_LOAD3D_JUMP_STRIDEMAX_LOAD3D_REPEAT_MODE >= intriParams.repeatModeintriParams.repeatTime >= MIN_LOAD3D_REPEAT_TIMESMAX_LOAD3D_CSIZE >= intriParams.cSizeintriParams.channelSize >= MIN_LOAD3D_CHANNEL_SIZEintriParams.kExtension >= MIN_LOAD3D_EXTENSIONintriParams.mExtension >= MIN_LOAD3D_EXTENSIONfalse && "dst pos unsupported."L0_SET_VALUEFMATRIXL1_3D_SIZEPADDINGkernel_operator_mm_debug.cppMAX_LOAD2D_SID >= intriParams.sidMAX_LOADIMANG_L1_HORSIZE >= intriParams.horSizeMAX_LOADIMANG_L1_VERSIZE >= intriParams.verSizeMAX_LOADIMANG_L1_HWSTART >= intriParams.horStartPMAX_LOADIMANG_L1_HWSTART >= intriParams.verStartPMAX_LOADIMANG_L1_TBPADSIZE >= intriParams.topPadSizeMAX_LOADIMANG_L1_TBPADSIZE >= intriParams.botPadSizeMAX_LOADIMANG_L1_LRPADSIZE >= intriParams.lPadSizeMAX_LOADIMANG_L1_LRPADSIZE >= intriParams.rPadSizeblockCount >= MIN_BLOCK_COUNTblockLen >= MIN_BLOCK_LEN[%s:%d] block_idx: %d, core_type: %s %d %s: %s(padValue=%s); [%s:%d] block_idx: %d, core_type: %s %d %s: set_l3d_rpt(%lu); false && "dst scope unsupported."MASK0MASK1[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)dst, (__ubuf__ %s*)src, nBurst=%hhu, lenBurst=%hhu, srcGap=%hhu, dstGap=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((%s %s*)dst, (%s %s*)src, baseIdx=%hu, repeat=%huu, srcStride=%hu, dstStride=%hu, sid=%huu, transpose=%hhu, addr_cal_mode_t=%huu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((%s %s*)dst, (%s %s*)src, baseIdx=%hu, repeat=%huu, srcStride=%hu, dstStride=%hu, sid=%huu, addr_cal_mode_t=%huu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b=, m=%hu, k=%hu, n=%hu, init_val_controlC=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b, m=%hu, k=%hu, n=%hu, unitFlag=%hhu, kDirectionAlign=%hhu, cmatrixSource=%hhu, cmatrixInitVal=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b, bias=%llu, m=%hu, k=%hu, n=%hu, unitFlag=%hhu, kDirectionAlign=%hhu, cmatrixSource=%hhu, cmatrixInitVal=%hhu); bfloat16_t[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__%s__ %s*)dst, repeat=%I64d, value=%s); cacbcbuf[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ca__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cb__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ca__ %s*)dst, (__cbuf__ %s*)src, stepK=%hu, stepM=%hu, posK=%hu, posM=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, transpose=%hhu, sizeChannel=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cb__ %s*)dst, (__cbuf__ %s*)src, stepK=%hu, stepM=%hu, posK=%hu, posM=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, transpose=%hhu, sizeChannel=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__cbuf__ %s*)src, stepK=%hu, stepM=%hu, posK=%hu, posM=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, transpose=%hhu, sizeChannel=%hu); void {anonymous}::CheckRpSort16Param(int32_t)void {anonymous}::CheckMrgSort4Param(const AscendC::MrgSort4Info&)ProposalComputeProposalComputeMrgSort4ModelProcessMrgSort4ComputeMrgSort4ModelProcessMrgSort4ComputeAscendC::MAX_SORT_ELE_LEN >= intriParams.elementLengths[i][%s:%d] block_idx: %d, core_type: %s %d %s: vmrgsort4, dataType=%d, repeat=%hhu, params.elementLengths[0]=%hu, params.elementLengths[1]=%hu, params.elementLengths[2]=%hu, params.elementLengths[3]=%hu, params.ifExhaustedSuspension=%hu, params.validBit=%hu SORT_VALID_BIT.find(intriParams.validBit) != SORT_VALID_BIT.end()AscendC::MAX_REPEAT_TIMES >= repeatvbitsort[%s:%d] block_idx: %d, core_type: %s %d %s: %s, dstLen=%d, srcLen=%d, dataType=%d, xmInstr=0x%X, repeat=%hhu, modeNumber=%hu [%s:%d] block_idx: %d, core_type: %s %d %s: dstLen=%d, readMemAddr=0x%X, writeMemAddr0=0x%X, writeMemAddr1=0x%X, writeMemAddr2=0x%X, writeMemAddr3=0x%X [%s:%d] block_idx: %d, core_type: %s %d %s: repeat mode is not valid kernel_operator_proposal_debug.cpprepeat >= AscendC::MIN_REPEAT_TIMESintriParams.repeatTimes >= AscendC::MIN_SORT_REPEAT_TIMESvmlavmlavmlavmlavmaddreluvmaddreluvmlavmlavmaddreluvmaddreluvaddvaddvsubvsubvmulvmulvdivvdivvmaxvmaxvminvminvmaddvmaddvaddvaddvsubvsubvmulvmulvdivvdivvmaxvmaxvminvminvmaddvmaddvaddvaddvsubvsubvmulvmulvmaxvmaxvminvminvandvandvorvorvaddvaddvsubvsubvmulvmulvmaxvmaxvminvminvandvandvorvorvaddreluvaddreluvsubreluvsubreluvaddreluvaddreluvsubreluvsubreluvaddreluvaddreluvsubreluvsubreluvmaddrelukernel_operator_vec_binary_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu); vmlavaddsvaddsvmulsvmulsvmaxsvmaxsvminsvminsvlreluvlreluvaddsvaddsvmulsvmulsvmaxsvmaxsvminsvminsvlreluvlreluvaddsvaddsvmulsvmulsvmaxsvmaxsvminsvminsvaddsvaddsvmulsvmulsvmaxsvmaxsvminsvminskernel_operator_vec_binary_scalar_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, scalar=%s, repeat=%hu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, scalar=%s, repeat=%hu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); void AscendC::VcmpvComputeCCE(std::string, std::string, void*, void*, void*, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint32_t, uint32_t)vcmpv_eqvcmpv_eqvcmpv_eqvcmpv_eqvcmpv_gevcmpv_gevcmpv_gevcmpv_gevcmpv_gtvcmpv_gtvcmpv_gtvcmpv_gtvcmpv_levcmpv_levcmpv_levcmpv_levcmpv_ltvcmpv_ltvcmpv_ltvcmpv_ltvcmpv_nevcmpv_nevcmpv_nevcmpv_nevoid AscendC::VcmpvsComputeCCE(std::string, std::string, void*, void*, T, uint8_t, uint16_t, uint16_t, uint16_t, uint16_t, uint32_t, uint32_t) [with T = float16::Fp16T; std::string = std::basic_string; uint8_t = unsigned char; uint16_t = short unsigned int; uint32_t = unsigned int]vcmpvs_eqvcmpvs_eqvcmpvs_gevcmpvs_gevcmpvs_gtvcmpvs_gtvcmpvs_levcmpvs_levcmpvs_ltvcmpvs_ltvcmpvs_nevcmpvs_nevoid AscendC::VcmpvsComputeCCE(std::string, std::string, void*, void*, T, uint8_t, uint16_t, uint16_t, uint16_t, uint16_t, uint32_t, uint32_t) [with T = float; std::string = std::basic_string; uint8_t = unsigned char; uint16_t = short unsigned int; uint32_t = unsigned int]vcmpvs_eqvcmpvs_eqvcmpvs_gevcmpvs_gevcmpvs_gtvcmpvs_gtvcmpvs_levcmpvs_levcmpvs_ltvcmpvs_ltvcmpvs_nevcmpvs_neGetC0Countvselvselvselvselvselvselvselvselvoid AscendC::VcmpComputeCCE(std::string, std::string, void*, void*, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint32_t)vcmp_eqvcmp_eqvcmp_eqvcmp_eqvcmp_gevcmp_gevcmp_gevcmp_gevcmp_gtvcmp_gtvcmp_gtvcmp_gtvcmp_levcmp_levcmp_levcmp_levcmp_ltvcmp_ltvcmp_ltvcmp_ltvcmp_nevcmp_nevcmp_nevcmp_nekernel_operator_vec_cmpsel_debug.cpp(srcTypeSize > 0) && "Invalid src datatype size!"[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ uint8_t*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu) eqgegtleltne[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ uint8_t*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, srcBlockStride=%hhu, dstRepeatStride=%hhu, srcRepeatStride=%hhu) [ERROR][%s][%s:%d][%s][%u] dtypeSize can not be 0 CMPMASK0CMPMASK1[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu, selectMode=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu) vcivcivcivcivcikernel_operator_vec_createvectorindex_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s)src, repeat=%hhu, dstBlockStride=%hu, dstRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); vector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupbf16kernel_operator_vec_duplicate_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, scalar=%s, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); vgathervgathervgathervgatherkernel_operator_vec_gather_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ int32_t*)offset, config=%hhu, dstRepeatStride=%hhu) vgathervreducevreducevreducevreducekernel_operator_vec_gather_mask_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hu, src0Blockstride=%hhu, src1Patten=%hhu, src0RepeatStride=%hu, src1RepeatStride=%hhu); vmulconv_f162s8vmulconv_f162s8vmulconv_f162u8vmulconv_f162u8kernel_operator_vec_mulconv_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ half*)src1, repeat=%hu, dstBlockStride=%hu, src0BlockStride=%hu, src1BlockStride=%hu, dstRepeatStride=%hu, src0RepeatStride=%hu, src1RepeatStride=%hu) vmulconv_f162s8vmulconv_f162u8ReduceComputeCCEWholeReduceComputeCCEBlockReduceSeriesBlockReduceSeriesWholeReduceSeriesWholeReduceSeriesWholeReduceSeriesC220WholeReduceSeriesC220[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu); kernel_operator_vec_reduce_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: dst, src, dstLen=%d, srcLen=%d, dstScope=%d, srcScope=%d,dataType=%u, iMASK0=0x%llX, iMASK1=0x%llX, readMemAddr=0x%llX, riteMemAddr=0x%llX, xmInstr=0x%llX, repeat=%hhu,dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu [%s:%d] block_idx: %d, core_type: %s %d %s: dst, src, dstLen=%d, srcLen=%d, dstScope=%d, srcScope=%d, dataType=%d, iMASK0=0x%llX, iMASK1=0x%llX, readMemAddr=0x%llX, writeMemAddr=0x%llX, xmInstr=0x%llX, repeat=%hhu, dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu, repeatStrideMode=%hu, strideSizeMode=%hu, order=%hu vscattervscattervscattervscatterkernel_operator_vec_scatter_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: (__ubuf__ int32_t*)dstOffsetLocal, %s((__ubuf__ %s*)src, config=%hhu, srcRepeatStride=%hhu) vscattervaxpyvaxpyvaxpyvaxpyvaxpyvaxpykernel_operator_vec_ternary_scalar_debug.cppv4dtransv4dtransv4dtransv4dtransv4dtransv4dtranskernel_operator_vec_transpose_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, imageSize=%hhu, nChannel=%hhu, conversionMode=%hhu); v4dtransGetC0Countvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluvrecvrecvrecvrecvrecvrecvrecvrecvexpvexpvexpvexpvexpvexpvexpvexpvlnvlnvlnvlnvlnvlnvlnvlnvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvnotvnotvnotvnotvnotvnotvnotvnotvabsvabsvabsvabskernel_operator_vec_unary_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); GetC0Countvcbd_s322s16vcbd_s322s16vconv_deqvconv_deqvconv_f162f32vconv_f162f32vconv_f162s16rvconv_f162s16rvconv_f162s32avconv_f162s32avconv_f162s32cvconv_f162s32cvconv_f162s32fvconv_f162s32fvconv_f162s32rvconv_f162s32rvconv_f162s32zvconv_f162s32zvconv_f162s8vconv_f162s8vconv_f162s8avconv_f162s8avconv_f162s8cvconv_f162s8cvconv_f162s8fvconv_f162s8fvconv_f162s8zvconv_f162s8zvconv_f162u8vconv_f162u8vconv_f162u8avconv_f162u8avconv_f162u8cvconv_f162u8cvconv_f162u8fvconv_f162u8fvconv_f162u8zvconv_f162u8zvconv_f322f16vconv_f322f16vconv_f322f16ovconv_f322f16ovconv_f322s16rvconv_f322s16rvconv_f322s16zvconv_f322s16zvconv_f322s32avconv_f322s32avconv_f322s32cvconv_f322s32cvconv_f322s32fvconv_f322s32fvconv_f322s32rvconv_f322s32rvconv_f322s32zvconv_f322s32zvconv_s162f16vconv_s162f16vconv_s162f32vconv_s162f32vconv_s322f32vconv_s322f32vconv_s82f16vconv_s82f16vconv_u82f16vconv_u82f16vconv_deqvconv_deqvconv_f162f32vconv_f162f32vconv_f162s16rvconv_f162s16rvconv_f162s32avconv_f162s32avconv_f162s32cvconv_f162s32cvconv_f162s32fvconv_f162s32fvconv_f162s32rvconv_f162s32rvconv_f162s32zvconv_f162s32zvconv_f162s8vconv_f162s8vconv_f162s8avconv_f162s8avconv_f162s8cvconv_f162s8cvconv_f162s8fvconv_f162s8fvconv_f162s8zvconv_f162s8zvconv_f162u8vconv_f162u8vconv_f162u8avconv_f162u8avconv_f162u8cvconv_f162u8cvconv_f162u8fvconv_f162u8fvconv_f162u8zvconv_f162u8zvconv_f322f16vconv_f322f16vconv_f322f16ovconv_f322f16ovconv_f322s16rvconv_f322s16rvconv_f322s16zvconv_f322s16zvconv_f322s32avconv_f322s32avconv_f322s32cvconv_f322s32cvconv_f322s32fvconv_f322s32fvconv_f322s32rvconv_f322s32rvconv_f322s32zvconv_f322s32zvconv_s162f16vconv_s162f16vconv_s162f32vconv_s162f32vconv_s322f32vconv_s322f32vconv_s82f16vconv_s82f16vconv_u82f16vconv_u82f16vconv_f162s16rvconv_f162s16rvconv_deqs162b8vconv_deqs162b8vconv_vdeqs162b8vconv_vdeqs162b8vconv_deqs162b8vconv_deqs162b8vconv_vdeqs162b8vconv_vdeqs162b8vconv_s162f16vconv_s162f16vconv_f162s4vconv_f162s4vsubreluconv_f162s8vsubreluconv_f162s8vaddreluconv_f162s8vaddreluconv_f162s8vsubreluconv_s162s8vsubreluconv_s162s8vaddreluconv_s162s8vaddreluconv_s162s8vsubreluconv_f322f16vsubreluconv_f322f16vaddreluconv_f322f16vaddreluconv_f322f16kernel_operator_vec_vconv_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu) [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu) [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu, halfBlock=%hhu) [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ void*)dst, (__ubuf__ half*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu) [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu, h=%hhu); vsubreluconv_f162s8vaddreluconv_f162s8vsubreluconv_s162s8vaddreluconv_s162s8vsubreluconv_f322f16vaddreluconv_f322f16deqs162b8hdeqs162b8lvdeqs162b8hvdeqs162b8ls4GetC0Countvpaddingvpaddingvpaddingvpaddingkernel_operator_vec_vpadding_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu, padMode=%hhu, padSide=%hhu); vpadding;$FMFkLG{GGԖ H8\HH<H<H@I|6I>IlJ|ITITlLT8b4h4LthkT>>,>lD???4@T@@$A tADABdB BTCTCC CDDDDDt-\-<<...$.t /\///(0\0 0 0| 14 d1< x1 1 1T2L3455L6\6Tt77 d8lY4E,ZhE[$F,]F]Fd_xG`GbDHeItgIgJ\h0JidJixJ4iKolKdqKrKtt,LuJLwLTwL\wLwL x0MxXMxlMxM$}N}N~TO|OO\PPP,PtPQt(Q-?-LAH.B.C.\E8/F/ H80TI0J0 L 1lMp1N 2Oh24;T<<<$= >?L?T@t@@DA\AA4B4BBt$CtCC\DdDD4E TEt EEDF\FF4G4GGt!$H$tH&H\)I+dI.I41J3TJt6J9J;DK\>K@KCD?dH\LHpLd$APAA @AG^ A 4&?d#APAA @AG^ A 4' Ad#APAA @AG^ A 48'PBd#APAA @AG^ A 4p'Cd#APAA @AG^ A 4'Ddh#APAA @AG^ A p'ED#A`AA @ABHXD B @AbD A @DSAxT(4G"A`AA @ABCGYC B @BcC B @DSA@(H@"A@AA 0ABV B a A 8x1IA@BA 0AH A B^B \1JtA0BA  N B G]I]I]I]I]I]I]$20NdA C CQ  <2pN8AB I  `2N8AB I  2N8AB J  2N8AB I $2NDA B BK 4*Nd APAA @AG^ A 4*Pd APAA @AG^ A 8d3@QAPBA 0AH A B`B 83QAPBA 0AH A B`B 03hRA0CA  E B B^B 4R@+R@A@AA 0ABV B a A @,S@A@AA 0ABV B a A @H,T@tA@AA 0ABV B a A @,U@DA@AA 0ABV B a A (45dA0D AQ A (`54dA0D AQ A (5pdA0D AQ A (5dA0D AQ A (5dA0D AQ A (6$dA0D AQ A (<6`dA0D AQ A (h6dA0D AQ A (6؆dA0D AQ A (6LU(A0B A] A \.HV\AA A pA D S A BAs AA X AA HAA\.WAA A pA D S A BAs AA X AA HAA\H/YAA A pA D S A BAr AB X AA HAA\/X[AA A pA D S A BAr AB X AA HAAPl8hA@A ADDKAD A @NB $\0\,AB AILMB CC zAAAI B  fGMCB qAAAA DH Y AAAB [S FJ FU AAAB lAA A AAABA A OA CB E1b@'AC AZ A C MBB A Y AAAA g AAAB qAA A AJABA A 2hf(AC AU B A MBB A Y AAAA g AAAB qAA A AJABA A 2i(AC AV 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A A FBDU B `  A f AB R AA nA AX@Ap A A F B DU B p  A j AB R AA tA A X@tAp A A F B DU B p  A j AB R AA tA A XPAеMA` A A FBDU B `  A f AB R AA nA AXA Ap A A F B DU B p  A g AA R AA pA A XB@ A` A A FBDU B `  A f AB R AA nA AXdBt A` A A FBDU B `  A f AB R AA nA AXBA A` A A FBDU B `  A f AB R AA nA AXC A` A A FBDU B `  A f AB R AA nA AXxC A` A A FBDU B `  A f AB R AA nA AXCDx A` A A FBDU B `  A f AB R AA nA AX0Dx5 A` A A FBDU B `  A f AB R AA nA AXD A` A A FBDU B `  A f AB R AA nA AXD A` A A FBDU B `  A f AB R AA nA A\DEl AA AB C ^ B A B D s AAB R AAB nA A A \E+ AA AB C ^ B A B D q AAB R AAB nA A A \F\0 AA AB C^ B AB D w AAB R AAB tAA A \dF,( AA AB C^ B AB D u AAB R AAB tAA A \F0h AA AB C^ B AB D w AAB R AAB tAA A \$G(' AA AB C^ B AB D u AAB R AAB tAA A \G AA AB C ^ B A B D s AAB R AAB nA A A \G4 AA AB C ^ B A B D q AAB R AAB nA A A \DHd AA AB C^ B AB D r AAA R AAB pAA A \H|# AA AB C ^ B A B D s AAB R AAB nA A A \I$AA AB C ^ B A B D q AAB R AAB nA A A ddIAA AB G E E tAW B  R AA nA A \IT]AA AB C ^ B A B D q AAB R AAB nA A A \,JAA AB C ^ B A B D s AAB R AAB nA A A \JAA AB C ^ B A B D q AAB R AAB nA A A \J<AA AB C ^ B A B D s AAB R AAB nA A A dLKYAA AB G E E tAW B  R AA nA A pKtAA AF B F E sAB AU B  R AA nA A \(LAA AB C ^ B A B D q AAB R AAB nA A A $T<A A AK U(UtX$pAAA BJDBR A ($ȦTB0A ABL P(dTB0A ABL 0A A AX A EHE ضxA0A AFBOEA B 0LDCIA A 0AAD B 0BBB B 0AD A 0B B C0PA A AX A EHE ȷܨxA0A AFBOEA B 0LDCIA A 0AAD B 0BBB B 0AD A 0B B CP EA@A ABGBB\AAC A @Ht}AA AD I  X B $pj(AD @ԩX$TA A AX A |@j,AD 0dA A AT A P ph(AB A ADHBAAA AAAD B ~DABB@ܱdӸAA A B DE i A @ AA A B DE i A <d{Ap A A D Bk B ptRAB A ADHBAAA AAAD B ~DABB@ЭAA A B DE i A @\ٷAA A B DE i A <hAp A A D Bk B (DTB0A ABL pX DAAA ABCHh C A BMXBh AD A pA BD kAYAC B p  I AB DtIA8A` A A BKW A X$ AAA ABCHh C A BMXBh8AD A pA BD kAYAC B p  I AB DtIA8A` A A BKW A D8B@A ABDR D @Ծ0A A AX A EHE (xA0A AFBOEA B 0LDCIA A 0AAD B 0BBB B 0AD A 0B B CdؿA` A A BEI^W B X B H @4AP A ACDBCBj BCAC B f DB ABBAC A P CEHAE B P FJB AA A AAAB MAtlGA` A A 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B $Td<A A AK |lN@$wA A AX A 0TxA A AT A P  Ap D A D `BA A4 CCAA B pDAA AcDAA AQAAA A`$|GAA('A A"!P$#B&%BB L C B JBdDYCLwp;AAA ADH x B LzpAAA ADH x B L(~AAA AGD G| B LxPAAA AGD G| B LAAA AGD G| B dtgAA('A C L$#D&%B"!BHK DH A JBdD[CPx0WAAA ADEH E i H A PT0'AAA ADEH E i H A P(0`AAA AIH DD p H A P|<`ǦAAA AIH DD p H A PH`AAA AIH DD p H A `$tgAA&%A CN"!D$#B K C B JBdD[CL@[AAA ADH l B L@/AAA ADH l B L(ЛhAAA AGD Gp B LxhץAAA AGD Gp B `XtAA&%A CL"!D$#C K C B JBdD[CL,@AAA ADH l B L|@sAAA ADH l B L|hGAAA AGD Gp B LhAAA AGD Gp B (\<A A AK $\<A A AK $H$8 A A AX A 0`tA A AU B P 0 +A('A A B#O&G$%D"HA!A AAAD A RA B!AB D A!AH CA!ACD!"AEL|AAA ADD B  A LAAA ADD B  A Ld<PAAA ADD B  A LAAA ADD B  A LAAA ADD B  A LT\AAA ADD B  A LxAAA ADD B  A LBAAA ADD B  A LD| AAA ADD B  A L֡AAA ADD B  A L<AAA ADD B  A L4jAAA ADD B  A T4A&%A A!DQ$BB"GA#A A AAAAC B RA B#A AA D A#A AH A#CA ACE#$B BC"AL0PAAA ADD B  A LxAAA ADD B  A LBAAA ADD B  A L X AAA ADD B  A Lp֟AAA ADD B  A LAAA ADD B  A WjA$#A ADP"BBHB GA!AA AAAAAHC A RA B!AAA D A!AAH A!CAACHE!"BBC AAHP؞AAA AB DEH C { H A PAAA AB DEH C { H A PpPdAAA AB DEH C { H A P *AAA AB DEH C { H A P AAA AB DEH C { H A PlLAAA AB DEH C { H A  A.-A A*)F,+S$#E'G(A%H&9 DB B TB(A%{&vD(A%I&TL&DH&FC%&A(MI&LHTcAAA AID B v A 8A@AA J  $<A@AA K L@TߜAAA AID B v A H8A@AA J  \<A@AA K Lxx\[AAA AID B v A ,!8A@AA J  P!<A@AA K L!\כAAA AID B v A #8A@AA J  #<A@AA K #kA*)A A'S%&A(DI#$A!"A 3 AAAAB A XA#$B!"A zD#$A!"A zC#$A!"A _E#$B!"B LLD,AAA ADF B y A L.AAA ADF B y A L0AAA ADF B y A L<43yAAA ADF B y A L5CAAA ADF B y A L7 AAA ADF B y A L,$:כAAA ADF B y A L|t<AAA ADF B y A L>kAAA ADF B y A LA5AAA ADF B y A LldCAAA ADF B y A LEɚAAA ADF B y A X tKAA ADBHxBb DB A fAEQX$QA A AX A 0DRA A AT A P tWPA` D A EiAABAAC A `  t CAC A PPpYpA$#A ABDF"! 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