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7AscendC5check22TikcppDataCopyPadCheckE_ZTIN7AscendC5check22TikcppDataCopyPadCheckE_ZN7AscendC5check24TikcppDataCopySliceCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppDataCopySliceCheckD2Ev_ZN7AscendC5check24TikcppDataCopySliceCheckD1Ev_ZN7AscendC5check24TikcppDataCopySliceCheckD0Ev_ZN7AscendC5check24TikcppDataCopySliceCheck23CheckSliceInfoParamtersERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck25DataCopyGetTotalInstrsNumEPKNS_9SliceInfoEPKj_ZN7AscendC5check24TikcppDataCopySliceCheck27CheckDataCopyIntrsParamtersERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck22CheckDataCopyInstrsNumERKSs_ZN7AscendC5check24TikcppDataCopySliceCheck14CheckAddrAlignEv_ZTSN7AscendC5check24TikcppDataCopySliceCheckE_ZTIN7AscendC5check24TikcppDataCopySliceCheckE_ZN7AscendC5check21TikcppLoaddata2dCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check23TikcppLoaddata3dv1Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check23TikcppLoaddata3dv2Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check26TikcppLoaddata3dv2ProCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppLoadImageToL1Check16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppLoadImageToL1CheckD2Ev_ZN7AscendC5check24TikcppLoadImageToL1CheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD2Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD1Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD2Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD1Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD2Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD2Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD1Ev_ZN7AscendC5check23TikcppLoaddata3dv2CheckD0Ev_ZN7AscendC5check24TikcppLoadImageToL1CheckD0Ev_ZN7AscendC5check23TikcppLoaddata3dv1CheckD0Ev_ZN7AscendC5check21TikcppLoaddata2dCheckD0Ev_ZN7AscendC5check26TikcppLoaddata3dv2ProCheckD0Ev_ZTSN7AscendC5check21TikcppLoaddata2dCheckE_ZTIN7AscendC5check21TikcppLoaddata2dCheckE_ZTSN7AscendC5check23TikcppLoaddata3dv1CheckE_ZTIN7AscendC5check23TikcppLoaddata3dv1CheckE_ZTSN7AscendC5check23TikcppLoaddata3dv2CheckE_ZTIN7AscendC5check23TikcppLoaddata3dv2CheckE_ZTSN7AscendC5check26TikcppLoaddata3dv2ProCheckE_ZTIN7AscendC5check26TikcppLoaddata3dv2ProCheckE_ZTSN7AscendC5check24TikcppLoadImageToL1CheckE_ZTIN7AscendC5check24TikcppLoadImageToL1CheckE_ZN7AscendC5check15TikcppMmadCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check15TikcppMmadCheckD2Ev_ZN7AscendC5check15TikcppMmadCheckD1Ev_ZN7AscendC5check15TikcppMmadCheckD0Ev_ZNK7AscendC5check15TikcppMmadCheck20CheckMmadParamsRangeEjRKSs_ZN7AscendC5check15TikcppMmadCheck17CheckMmadOverflowERKSs_ZTSN7AscendC5check15TikcppMmadCheckE_ZTIN7AscendC5check15TikcppMmadCheckE_ZN7AscendC5check20TikcppVecBinaryCheckD2Ev_ZN7AscendC5check20TikcppVecBinaryCheckD1Ev_ZN7AscendC5check20TikcppVecBinaryCheckD0Ev_ZN7AscendC5check20TikcppVecBinaryCheck14CheckAddrAlignEv_ZTSN7AscendC5check20TikcppVecBinaryCheckE_ZTIN7AscendC5check20TikcppVecBinaryCheckE_ZN7AscendC5check26TikcppVecBinaryScalarCheckD2Ev_ZN7AscendC5check26TikcppVecBinaryScalarCheckD1Ev_ZN7AscendC5check26TikcppVecBinaryScalarCheckD0Ev_ZN7AscendC10Int4Setter8InstanceEv_ZTSN7AscendC5check26TikcppVecBinaryScalarCheckE_ZTIN7AscendC5check26TikcppVecBinaryScalarCheckE_ZN7AscendC5check23TikcppVecBroadCastCheck17CheckAllHighLevelEv_ZN7AscendC5check23TikcppVecBroadCastCheckD2Ev_ZN7AscendC5check23TikcppVecBroadCastCheckD1Ev_ZN7AscendC5check23TikcppVecBroadCastCheckD0Ev_ZN7AscendC5check23TikcppVecBroadCastCheck22CheckSrcTensorOverflowERKSs_ZTSN7AscendC5check23TikcppVecBroadCastCheckE_ZTIN7AscendC5check23TikcppVecBroadCastCheckE_ZN7AscendC5check24TikcppBroadCastToMMCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check24TikcppBroadCastToMMCheckD2Ev_ZN7AscendC5check24TikcppBroadCastToMMCheckD1Ev_ZN7AscendC5check24TikcppBroadCastToMMCheckD0Ev_ZTSN7AscendC5check24TikcppBroadCastToMMCheckE_ZTIN7AscendC5check24TikcppBroadCastToMMCheckE_ZN7AscendC5check27TikcppVecCompareScalarCheckD2Ev_ZN7AscendC5check27TikcppVecCompareScalarCheckD1Ev_ZN7AscendC5check27TikcppVecCompareScalarCheckD0Ev_ZN7AscendC5check27TikcppVecCompareScalarCheck14CheckAddrAlignEv_ZTSN7AscendC5check27TikcppVecCompareScalarCheckE_ZTIN7AscendC5check27TikcppVecCompareScalarCheckE_ZN7AscendC5check17TikcppVecDupCheckD2Ev_ZN7AscendC5check17TikcppVecDupCheckD1Ev_ZN7AscendC5check17TikcppVecDupCheckD0Ev_ZTSN7AscendC5check17TikcppVecDupCheckE_ZTIN7AscendC5check17TikcppVecDupCheckE_ZN7AscendC5check20TikcppVecGatherCheck17CheckAllHighLevelEv_ZN7AscendC5check20TikcppVecGatherCheckD2Ev_ZN7AscendC5check20TikcppVecGatherCheckD1Ev_ZN7AscendC5check20TikcppVecGatherCheckD0Ev_ZN7AscendC5check20TikcppVecGatherCheck25CheckOffsetTensorOverflowERKSs_ZTSN7AscendC5check20TikcppVecGatherCheckE_ZTIN7AscendC5check20TikcppVecGatherCheckE_ZN7AscendC5check21TikcppGatherMaskCheckD2Ev_ZN7AscendC5check21TikcppGatherMaskCheckD1Ev_ZN7AscendC5check21TikcppGatherMaskCheckD0Ev_ZTSN7AscendC5check21TikcppGatherMaskCheckE_ZTIN7AscendC5check21TikcppGatherMaskCheckE_ZN7AscendC5check22TikcppVecProposalCheck16CheckAllLowLevelESt6vectorImSaImEE_ZN7AscendC5check22TikcppVecProposalCheckD2Ev_ZN7AscendC5check22TikcppVecProposalCheckD1Ev_ZN7AscendC5check22TikcppVecProposalCheckD0Ev_ZNK7AscendC5check22TikcppVecProposalCheck8CountBitEt_ZNK7AscendC5check22TikcppVecProposalCheck10Vbs16CheckEv_ZNK7AscendC5check22TikcppVecProposalCheck12VconcatCheckEv_ZNK7AscendC5check22TikcppVecProposalCheck13VextractCheckEv_ZNK7AscendC5check22TikcppVecProposalCheck11Vms4v2CheckEv_ZNK7AscendC5check22TikcppVecProposalCheck9Vms4CheckEv_ZNK7AscendC5check22TikcppVecProposalCheck10Vbs32CheckEv_ZTSN7AscendC5check22TikcppVecProposalCheckE_ZTIN7AscendC5check22TikcppVecProposalCheckE_ZN7AscendC5check20TikcppVecReduceCheckD2Ev_ZN7AscendC5check20TikcppVecReduceCheckD1Ev_ZN7AscendC5check20TikcppVecReduceCheckD0Ev_ZNK7AscendC5check20TikcppVecReduceCheck13AlignStartPosEjj_ZN7AscendC5check20TikcppVecReduceCheck18CheckAllDtypeBytesERKSs_ZNK7AscendC5check20TikcppVecReduceCheck13ReduceBodyCalERKSt6vectorIjSaIjEERjS7__ZN7AscendC5check20TikcppVecReduceCheck18CheckCheckWorkSizeERKSsmj_ZN7AscendC5check20TikcppVecReduceCheck21CheckWorkTensorOffsetERKSs_ZN7AscendC5check20TikcppVecReduceCheck24CheckWorkTensorSizeEqualERKSs_ZN7AscendC5check20TikcppVecReduceCheck24CheckDstTenssorSizeRangeERKSs_ZNKSt3mapIhmSt4lessIhESaISt4pairIKhmEEE2atERS3__ZN7AscendC5check12GlobalParams8InstanceEv_ZTSN7AscendC5check20TikcppVecReduceCheckE_ZTIN7AscendC5check20TikcppVecReduceCheckE_ZN7AscendC5check25TikcppVecReduceOtherCheck17CheckAllHighLevelEv_ZN7AscendC5check25TikcppVecReduceOtherCheckD2Ev_ZN7AscendC5check25TikcppVecReduceOtherCheckD1Ev_ZN7AscendC5check25TikcppVecReduceOtherCheckD0Ev_ZN7AscendC5check25TikcppVecReduceOtherCheck26CheckWholeReduceDtypeBytesERKSs_ZN7AscendC5check25TikcppVecReduceOtherCheck23CheckWholeReduceDstSizeERKSs_ZN7AscendC5check25TikcppVecReduceOtherCheck23CheckBlockReduceDstSizeERKSs_ZN7AscendC5check25TikcppVecReduceOtherCheck22CheckPairReduceDstSizeERKSs_ZTSN7AscendC5check25TikcppVecReduceOtherCheckE_ZTIN7AscendC5check25TikcppVecReduceOtherCheckE_ZN7AscendC5check23TikcppVecTransposeCheck17CheckAllHighLevelEv_ZN7AscendC5check23TikcppVecTransposeCheckD2Ev_ZN7AscendC5check23TikcppVecTransposeCheckD1Ev_ZN7AscendC5check23TikcppVecTransposeCheckD0Ev_ZTSN7AscendC5check23TikcppVecTransposeCheckE_ZTIN7AscendC5check23TikcppVecTransposeCheckE_ZN7AscendC12ModelFactoryC2Ev_ZN7AscendC12ModelFactoryD2Evpv_destroy_ZN7AscendC12ModelFactory8GetModelEv_ZN7AscendC12ModelFactory13SetSprPaddingEm_ZNK7AscendC12ModelFactory13GetSprPaddingEv_ZNK7AscendC12ModelFactory13GetSprFMatrixEv_ZNK7AscendC12ModelFactory14GetSprL13DSizeEv_ZN7AscendC12ModelFactory13SetLreluAlphaEm_ZNK7AscendC12ModelFactory10GetMaskLowEv_ZNK7AscendC12ModelFactory11GetMaskHighEv_ZN7AscendC12ModelFactory9SetL3dRptEm_ZNK7AscendC12ModelFactory9GetL3dRptEv_ZNK7AscendC12ModelFactory11GetDataExp0Ev_ZNK7AscendC12ModelFactory11GetDataExp1Ev_ZNK7AscendC12ModelFactory11GetDataExp2Ev_ZNK7AscendC12ModelFactory11GetDataExp3Ev_ZN7AscendC12ModelFactory14SetVARegGmAddrEjPm_ZN7AscendC12ModelFactory14GetVARegGmAddrEjRA8_m_ZN7AscendC12ModelFactory14SetVARegUbAddrEjPm_ZN7AscendC12ModelFactory14GetVARegUbAddrEjRA8_m_ZNK7AscendC12ModelFactory16GetGatherSrcAddrEv_ZNK7AscendC12ModelFactory18GetGatherSrcLengthEv_ZNK7AscendC12ModelFactory17GetScatterDstAddrEv_ZNK7AscendC12ModelFactory19GetScatterDstLengthEv_ZNK7AscendC12ModelFactory14SetGPRRegisterEmmpv_write_gpr_register_ZNK7AscendC12ModelFactory14SetSPRRegisterEPKcmpv_write_spr_registerpv_read_spr_registerpv_write_memorypv_steppv_read_memory_ZNK7AscendC12ModelFactory10GetMaskLenEv_ZNK7AscendC12ModelFactory11GetMaskModeEv_ZNK7AscendC12ModelFactory15GetVectorExtentEtttttpv_create_ZNK7AscendC12ModelFactory15SetOverflowModeEm_ZN7AscendC4dcciEPvm_ZN7AscendC16CheckLoad2dParamERKNS_16LoadData2DParamsE_ZN7AscendC24CheckLoadImageToL1ParamsERKNS_19LoadImageToL1ParamsE_ZN7AscendC19CheckBroadCastParamEhh_ZN7AscendC10MmadPvImplEPvS0_S0_RKNS_14BinaryPvParamsINS_12MMADDataTypeEEEttthbbbm_ZN7AscendC11set_paddingEt_ZN7AscendC11set_paddingEs_ZN7AscendC11set_paddingEm_ZN7AscendC11set_l3d_rptEm_ZN7AscendC11set_paddingEN7float165Fp16TE_ZN7AscendC14Load2dv1PvImplEPvS0_RKNS_13UnaryPvParamsINS_8DataTypeEEERKNS_16LoadData2DParamsE_ZN7AscendC21BroadcastUbToL0cModelEPvS0_iiNS_12BRCDstIDTypeEillmmiiPi_ZN7AscendC18broadcast_ub_to_ccEPiS0_hhhh_ZN7AscendC18broadcast_ub_to_ccEPfS0_hhhh_ZN7AscendC18broadcast_ub_to_ccEPN7float165Fp16TES2_hhhh_ZN7AscendC18broadcast_ub_to_ccEPfPN7float165Fp16TEhhhh_ZN7AscendC8Load2DPvIhEEvPT_S2_NS_8HardwareES3_RKNS_16LoadData2DParamsE_ZN7AscendC15load_cbuf_to_caEPhS0_ththb15addr_cal_mode_t_ZN7AscendC15load_cbuf_to_cbEPhS0_ththb15addr_cal_mode_t_ZN7AscendC13load_gm_to_caEPhS0_thth15addr_cal_mode_t_ZN7AscendC13load_gm_to_cbEPhS0_thth15addr_cal_mode_t_ZN7AscendC15load_gm_to_cbufEPhS0_thth15addr_cal_mode_t_ZN7AscendC8Load2DPvIaEEvPT_S2_NS_8HardwareES3_RKNS_16LoadData2DParamsE_ZN7AscendC15load_cbuf_to_caEPaS0_ththb15addr_cal_mode_t_ZN7AscendC15load_cbuf_to_cbEPaS0_ththb1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%zu)uint16_tL1OUTL0CSC16vexpvrsqrtvreluvrecvlnvabsvnotvsqrtb16b32fmixvaddsvmulsvaddvsubvmulvdivvmaxvminvandvorf322f16f162s8f162u8dequ82f16s82f16f162s8af162s8ff162s8cf162s8zf322s32af322s32ff322s32cf322s32zf322s32rf162u8af162u8ff162u8cf162u8zs322f32f322f16of322s16rf322s16zs162f32s162f16f162s16rf162s4vdeqs162b8f322f32rf322f32af322f32ff322f32cs642s32s642f32bf162f32bf162s32rbf162s32abf162s32fbf162s32cbf162s32znonecopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_ubuf_to_cccopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_vector_cc_to_ubufcopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_ubuf_to_cccopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_matrix_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_depthwise_cc_to_ubufcopy_ubuf_to_ubufcopy_ubuf_to_ubufcopy_ubuf_to_gmcopy_ubuf_to_gmcopy_ubuf_to_cbufcopy_ubuf_to_cbufcopy_gm_to_ubufcopy_gm_to_ubufcopy_gm_to_cbufcopy_gm_to_cbufcopy_cbuf_to_ubufcopy_cbuf_to_ubufset_atomic_noneset_atomic_nonekernel_utils.cppCONDCONDITION_FLAGVMS4_SRRSVD_CNTARACC_VALST_ATOMIC_CFGMAX_MIN_CNTARCH_VERPCPIPE_VPIPE_MPIPE_MTE1PIPE_MTE2PIPE_MTE3PIPE_SSTATUSCTRL[%s:%d] block_idx: %d, core_type: %s %d %s:%serror: file name is empty [%s:%d] block_idx: %d, core_type: %s %d %s: warn: realpath return nullptr [%s:%d] block_idx: %d, core_type: %s %d %s: WriteFile(): file name = '%s', size = %d [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: buffer is nullptr [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: can't open file: %s [%s:%d] block_idx: %d, core_type: %s %d %s:%serror: write size %d [%s:%d] block_idx: %d, core_type: %s %d %s: set_fmatrix(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_deqscale((half)%f); [%s:%d] block_idx: %d, core_type: %s %d %s: set_deqscale(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_vector_mask(%lu, %lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_mask_count(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_mask_norm(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_cond(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_condition_flag(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_vms4_sr(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_rsvd_cnt(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_ar(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_acc_val(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_st_atomic_cfg(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_max_min_cnt(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_cmpmask((__ubuf__ void* )dst=%p); [maskLow=%lu, maskHigh=%lu] [%s:%d] block_idx: %d, core_type: %s %d %s: set_cmpmask((__ubuf__ void* )src=%p); [maskLow=%lu, maskHigh=%lu] [%s:%d] block_idx: %d, core_type: %s %d %s: set_l1_3d_size(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: trap(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_V); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_ALL); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_S); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_M); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE1); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE2); [%s:%d] block_idx: %d, core_type: %s %d %s: pipe_barrier(PIPE_MTE3); [%s:%d] block_idx: %d, core_type: %s %d %s: get_arch_ver(); [%s:%d] block_idx: %d, core_type: %s %d %s: get_pc(); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ uint64_t*)address, offset=%hu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)addr, prefetchLen=%I64d); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)addr); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_0(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_1(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_2(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: set_data_exp_3(%lu); [%s:%d] block_idx: %d, core_type: %s %d %s: wait_flag(%s, %s, %d); [%s:%d] block_idx: %d, core_type: %s %d %s: set_flag(%s, %s, %d); [%s:%d] block_idx: %d, core_type: %s %d %s: set_condition_flag(); [%s:%d] block_idx: %d, core_type: %s %d %s: set_st_atomic_cfg(); %d%f%ld%luset_data_exp_3set_data_exp_2set_data_exp_1set_data_exp_0preloadpreloadpreloadpreloaddc_preloaddc_preloadget_pcget_arch_verpipe_barrierwait_flagset_flagtrapset_flagwait_flagstd::string AscendC::FormatEvent(int32_t)set_l1_3d_sizeset_cmpmaskget_cmpmaskget_max_min_cntset_st_atomic_cfgget_st_atomic_cfgget_acc_valget_arget_rsvd_cntget_vms4_srget_condition_flagset_condition_flagget_condset_condset_mask_normset_mask_countset_vector_maskset_deqscaleset_deqscaleset_fmatrixTensorWriteFileG3?_p0tikcpp_base_check.cppvector::_M_realloc_insert[ERROR]%s [%s:%d]%s blockLen != 0dtypeBytes != 0dtypeBytes[0] != 0dtypeBytes[1] != 0GMBIASFIXBUF[ERROR]%s: mask value is not in range [%lu, %lu] [%s:%d]%s: mask value is not in range [%lu, %lu] [ERROR]%s: dst/src bit length is 32, mask_h must be 0 [%s:%d]%s: dst/src bit length is 32, mask_h must be 0 [ERROR]%s: dst/src bit length is 64, mask_h must be 0 [%s:%d]%s: dst/src bit length is 64, mask_h must be 0 [ERROR]%s, addr0: %lu, addr1: %lu, needSize: %lu [%s:%d]%s, addr0: %lu, addr1: %lu, needSize: %lu [ERROR]%s, src hardware address: %lu, dst hardware address: %lu [%s:%d]%s, src hardware address: %lu, dst hardware address: %lu [ERROR]%s, src hardware address: %lu, dst hardware address: %lu, needSize: %lu [%s:%d]%s, src hardware address: %lu, dst hardware address: %lu, needSize: %lu [ERROR]%s, Need size: %lu, while tensor size is %lu [%s:%d]%s, Need size: %lu, while tensor size is %lu [ERROR]%s, Allocated buffer size overflow, allocate buffer size is %lu, the limit size is %lu. [%s:%d]%s, Allocated buffer size overflow, allocate buffer size is %lu, the limit size is %lu. [ERROR]the tensorPos/expectPos hardware pos not found,tensorPos index is %hhu, expectedPos is %hhu. [%s:%d]the tensorPos/expectPos hardware pos not found,tensorPos index is %hhu, expectedPos is %hhu. [ERROR]%s, the tensor hardware pos is %s, the expect pos is %s. [%s:%d]%s, the tensor hardware pos is %s, the expect pos is %s. bool AscendC::check::TikcppBaseCheck::CheckTensorOverflowLow(std::vector&, uint64_t, uint32_t, std::vector&, const string&) constuint64_t AscendC::check::CalculateVectorMaxOffset(uint64_t, uint64_t, uint64_t, uint64_t, uint64_t)bool AscendC::check::CheckOverlapSingleMany(std::vector&, std::vector&, std::vector&, const string&)[ERROR]intriName is null.tikcpp_check_util.cpp[%s:%d]intriName is null. N7AscendC5check15TikcppBaseCheckEtikcpp_copy_check.cppdst calculate size overflowsrc calculate size overflow[ERROR]maskArray size is zero.[%s:%d]maskArray size is zero. check dst tensor position failedcheck src tensor position failedcheck dst tensor buffersize failedcheck src tensor buffersize faileddst and src address overlappingN7AscendC5check15TikcppCopyCheckEtikcpp_data_copy_check.cpp[ERROR][%s][%s:%d][%s][%u] illegal hardPos %d [ERROR]instr %s src addr is %lu, which should be %u B Aligned [%s:%d]instr %s src addr is %lu, which should be %u B Aligned [ERROR]instr %s dst addr is %lu, which should be %u B Aligned [%s:%d]instr %s dst addr is %lu, which should be %u B Aligned GetHardwareBaseAddr    N7AscendC5check19TikcppDataCopyCheckE[ERROR]%s, size of leftPadding or rightpadding should be less than 32 Bytes tikcpp_data_copy_pad_check.cpp[%s:%d]%s, size of leftPadding or rightpadding should be less than 32 Bytes N7AscendC5check22TikcppDataCopyPadCheckEcheck dataCopyPacheck sliceInfo paramtersCore_[ERROR]%s, dstSliceInfo[%u]'s busrt len (%u) should be equal to SliceInfo[%u]'s busrt len (%u) tikcpp_data_copy_slice_check.cpp[%s:%d]%s, dstSliceInfo[%u]'s busrt len (%u) should be equal to SliceInfo[%u]'s busrt len (%u) [ERROR]%s, dim[%u]'s dstSliceInfo's busrt len should be equal to 1, but get (%u) [%s:%d]%s, dim[%u]'s dstSliceInfo's busrt len should be equal to 1, but get (%u) [ERROR]%s, dstSliceInfo[%u]'s start index (%u) should be lee than dstSliceInfo[%u]'s end index (%u) [%s:%d]%s, dstSliceInfo[%u]'s start index (%u) should be lee than dstSliceInfo[%u]'s end index (%u) [ERROR]%s, dstSliceInfo[%u]'s end index (%u) should be less than dstSliceInfo[%u]'s shape (%u) [%s:%d]%s, dstSliceInfo[%u]'s end index (%u) should be less than dstSliceInfo[%u]'s shape (%u) [ERROR]%s, srcSliceInfo[%u]'s start index (%u) should be lee than srcSliceInfo[%u]'s end index (%u) [%s:%d]%s, srcSliceInfo[%u]'s start index (%u) should be lee than srcSliceInfo[%u]'s end index (%u) [ERROR]%s, srcSliceInfo[%u]'s end index (%u) should be less than dst tensor dim[%u]'s shape (%u) [%s:%d]%s, srcSliceInfo[%u]'s end index (%u) should be less than dst tensor dim[%u]'s shape (%u) [ERROR]%s, construct datacopy intrs paramters block count failed, please check srcSliceInfo[0].burstLen(%u), srcSliceInfo[0].startIndex(%u), srcSliceInfo[0].endIndex(%u), srcSliceInfo[0].stride(%u) [%s:%d]%s, construct datacopy intrs paramters block count failed, please check srcSliceInfo[0].burstLen(%u), srcSliceInfo[0].startIndex(%u), srcSliceInfo[0].endIndex(%u), srcSliceInfo[0].stride(%u) [ERROR]%s, one dst stride len (%lu) should be multiple of block size (%lu), dstSliceInfo[0].stride(%u), dstDtypeBytes(%u) [%s:%d]%s, one dst stride len (%lu) should be multiple of block size (%lu), dstSliceInfo[0].stride(%u), dstDtypeBytes(%u) [ERROR]%s, one src stride len (%lu) should be multiple of block size (%lu), srcSliceInfo[0].stride(%u), srcDtypeBytes(%u) [%s:%d]%s, one src stride len (%lu) should be multiple of block size (%lu), srcSliceInfo[0].stride(%u), srcDtypeBytes(%u) [ERROR]%s, srcIntrsNum(%u) != dstIntrsNum(%u) [%s:%d]%s, srcIntrsNum(%u) != dstIntrsNum(%u) [ERROR]%s, srcIntrsNum(%u) is bigger than MAX_SLICE_SIZE(%u), please reset the sliceInfo parameter [%s:%d]%s, srcIntrsNum(%u) is bigger than MAX_SLICE_SIZE(%u), please reset the sliceInfo parameter check dst tensor position failed, it should be UBcheck total number of instructions mov or mov_align failedcheck src tensor position failed, it should be UBcheck ub tensor buffersize failedcheck data copy instr paramtersGetHardwareBaseAddr    N7AscendC5check24TikcppDataCopySliceCheckEtikcpp_loaddata_check.cpp[ERROR]check dst tensor position failed,the dst hardware pos support L1.[%s:%d]check dst tensor position failed,the dst hardware pos support L1. [ERROR]dst dtype bytes is zeros[%s:%d]dst dtype bytes is zeros [ERROR]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B or UB.[%s:%d]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B or UB. [ERROR]check src tensor position failed,the src hardware pos only support L1.[%s:%d]check src tensor position failed,the src hardware pos only support L1. [ERROR]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B.[%s:%d]check dst tensor position failed,the src hardware pos is L1, the dst hardware pos support L0A or L0B. [ERROR]check dst tensor position failed,the src hardware pos is GM, the dst hardware pos support L1 or L0A or L0B.[%s:%d]check dst tensor position failed,the src hardware pos is GM, the dst hardware pos support L1 or L0A or L0B. [ERROR]src/dst dtype bytes is zeros[%s:%d]src/dst dtype bytes is zeros [ERROR]check src tensor position failed,the src hardware pos support L1 or GM.[%s:%d]check src tensor position failed,the src hardware pos support L1 or GM. [ERROR]check src tensor position failed,the src hardware pos support L1.[%s:%d]check src tensor position failed,the src hardware pos support L1. N7AscendC5check21TikcppLoaddata2dCheckEN7AscendC5check23TikcppLoaddata3dv1CheckEN7AscendC5check23TikcppLoaddata3dv2CheckEN7AscendC5check26TikcppLoaddata3dv2ProCheckEN7AscendC5check24TikcppLoadImageToL1CheckE[ERROR]%s: value(%u) is not in range [%u, %u] [%s:%d]%s: value(%u) is not in range [%u, %u] [ERROR]%s: needElementL0c(%u) is bigger than totalL0CSize(%u) [%s:%d]%s: needElementL0c(%u) is bigger than totalL0CSize(%u) [ERROR]%s: needElementL0b(%u) + needElementL0a(%u) is bigger than totalL1Size(%u) [%s:%d]%s: needElementL0b(%u) + needElementL0a(%u) is bigger than totalL1Size(%u) check src0 tensor position failedcheck src1 tensor position failedcheck MmadParams'm range failedcheck MmadParams'n range failedcheck MmadParams'k range failedtikcpp_mmad_check.cppcheck mmad overflow failedN7AscendC5check15TikcppMmadCheckEtikcpp_vec_binary_check.cppvcmpvsrc0 calculate size overflowsrc1 calculate size overflowcheck src0 tensor buffersize failedcheck src1 tensor buffersize faileddst and src0 address overlappingdst and src1 address overlapping[ERROR]instr %s dst addr is %lu, which should be 32B Aligned [%s:%d]instr %s dst addr is %lu, which should be 32B Aligned [ERROR]instr %s src0 addr is %lu, which should be 32B Aligned [%s:%d]instr %s src0 addr is %lu, which should be 32B Aligned [ERROR]instr %s src1 addr is %lu, which should be 32B Aligned [%s:%d]instr %s src1 addr is %lu, which should be 32B Aligned GetHardwareBaseAddr    N7AscendC5check20TikcppVecBinaryCheckEtikcpp_vec_binary_scalar_check.cppGetHardwareBaseAddr    N7AscendC5check26TikcppVecBinaryScalarCheckE[ERROR]src dtype bytes is zerostikcpp_vec_broadcast_check.cpp[%s:%d]src dtype bytes is zeros N7AscendC5check23TikcppVecBroadCastCheckEN7AscendC5check24TikcppBroadCastToMMCheckEtikcpp_vec_compare_scalar_check.cppGetHardwareBaseAddr    N7AscendC5check27TikcppVecCompareScalarCheckEtikcpp_vec_dup_check.cppN7AscendC5check17TikcppVecDupCheckEtikcpp_vec_gather_check.cpp[ERROR]offset dtype bytes is zeros[%s:%d]offset dtype bytes is zeros check offset tensor position failedcheck offset tensor buffersize failedoffset calculate size overflowN7AscendC5check20TikcppVecGatherCheckEtikcpp_vec_gather_mask_check.cppN7AscendC5check21TikcppGatherMaskCheckEsrctikcpp_vec_proposal_check.cppvbs32vconcatvextractvbs16vms4vms4v2[ERROR]valid bit number overflow 4.[%s:%d]valid bit number overflow 4. [ERROR]src index overflow element size.[%s:%d]src index overflow element size. N7AscendC5check22TikcppVecProposalCheckEtikcpp_vec_reduce_check.cpp[ERROR]dtype bytes is zeros[%s:%d]dtype bytes is zeros Check Reduce data typeCheck Reduce dst data sizevreduce_sumvreduce_max[ERROR]byteLen is %u, it shoule be greater than 0 [%s:%d]byteLen is %u, it shoule be greater than 0 [ERROR]%s, Reduce need dst data type (%u),dst src type (%u), dst wokr type (%u) should be same [%s:%d]%s, Reduce need dst data type (%u),dst src type (%u), dst wokr type (%u) should be same [ERROR]%s, Worktensor's size should be more than %lu, but get %lu [%s:%d]%s, Worktensor's size should be more than %lu, but get %lu [ERROR]%s, elementNumPerRep can not be 0. [%s:%d]%s, elementNumPerRep can not be 0. [ERROR]%s, Need least output size: %lu, while tensor size is %lu [%s:%d]%s, Need least output size: %lu, while tensor size is %lu check interface level 0 dst tensor position failedcheck interface level 0 src tensor position failedcheck interface level 0 work tensor position failedcheck work tensor buffersize failedCheck Reduce sum workLocal tensor sizeCheck Reduce max workLocal tensor sizeCheck Reduce min workLocal tensor sizecheck interface level 2 dst tensor position failedcheck interface level 2 src tensor position failedcheck interface level 2 work tensor position failedCheck Reduce Sum workLocal tensor sizeN7AscendC5check20TikcppVecReduceCheckEvcmaxvcminvcaddvcgaddCheck Whole Reduce data typevcgmaxvcgminvcpadd[ERROR]%s, Reduce need dst data type (%u),dst src type (%u), should be same tikcpp_vec_reduce_other_check.cpp[%s:%d]%s, Reduce need dst data type (%u),dst src type (%u), should be same [ERROR]%s, srcSize is: %lu, output size: %lu, while dst tensor size should be half of src tensor size [%s:%d]%s, srcSize is: %lu, output size: %lu, while dst tensor size should be half of src tensor size Check Whole Reduce dst data sizeCheck Block Reduce dst data sizeCheck Pair Reduce dst data sizeN7AscendC5check25TikcppVecReduceOtherCheckEN7AscendC5check23TikcppVecTransposeCheckEtik_pv_factory.cppvaIndex < VA_REG_NUMblockNum != 0./simlog/model_ != nullptr[%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_gpr_register X(%ld) error, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_spr_register %s error, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_write_memory error, mem_addr: %lu, mem_scope: %d, src_addr: %p, src_len: %lu, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_step error, instr_value: %u, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s:%spv_read_memory error, mem_addr: %lu, mem_scope: %u, dst_addr: %p, dst_len: %lu, code: %d [%s:%d] block_idx: %d, core_type: %s %d %s: maskLow_=%lu, maskHigh_=%lu, maskLen=%hu, blkNumLastRep=%hu, eleNumLastBlk=%hu, maxOffset=%lu [%s:%d] block_idx: %d, core_type: %s %d %s: maskLow_=%lu, maskHigh_=%lu, counterElements=%hu, inferredRepeatTimes=%hu, blkNumLastRep=%hu, eleNumLastBlk=%hu, maxOffset=%lu GetVectorExtentuint64_t AscendC::ModelFactory::GetVectorExtent(uint16_t, uint16_t, uint16_t, uint16_t, uint16_t) constGetOutputRunSetInputSetSPRRegistersSetGPRRegistersvoid AscendC::ModelFactory::GetVARegUbAddr(uint32_t, uint64_t (&)[8])void AscendC::ModelFactory::SetVARegUbAddr(uint32_t, uint64_t*)void AscendC::ModelFactory::GetVARegGmAddr(uint32_t, uint64_t (&)[8])void AscendC::ModelFactory::SetVARegGmAddr(uint32_t, uint64_t*)void AscendC::ModelFactory::Init()kernel_operator_fixpipe_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__gm__ void*)dst, entire=%hu); dccidccikernel_operator_mm_debug.cppblockCount >= MIN_BLOCK_COUNTblockLen >= MIN_BLOCK_LENbfloat16_tcacbcbufMAX_LOAD2D_SID >= intriParams.sidMAX_LOADIMANG_L1_HORSIZE >= intriParams.horSizeMAX_LOADIMANG_L1_VERSIZE >= intriParams.verSizeMAX_LOADIMANG_L1_HWSTART >= intriParams.horStartPMAX_LOADIMANG_L1_HWSTART >= intriParams.verStartPMAX_LOADIMANG_L1_TBPADSIZE >= intriParams.topPadSizeMAX_LOADIMANG_L1_TBPADSIZE >= intriParams.botPadSizeMAX_LOADIMANG_L1_LRPADSIZE >= intriParams.lPadSizeMAX_LOADIMANG_L1_LRPADSIZE >= intriParams.rPadSize[%s:%d] block_idx: %d, core_type: %s %d %s: %s(padValue=%s); [%s:%d] block_idx: %d, core_type: %s %d %s: set_l3d_rpt(%lu); false && "dst scope unsupported."[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)dst, (__ubuf__ %s*)src, nBurst=%hhu, lenBurst=%hhu, srcGap=%hhu, dstGap=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((%s %s*)dst, (%s %s*)src, baseIdx=%hu, repeat=%huu, srcStride=%hu, sid=%huu, transpose=%hhu, addr_cal_mode_t=%huu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((%s %s*)dst, (%s %s*)src, baseIdx=%hu, repeat=%huu, srcStride=%hu, sid=%huu, addr_cal_mode_t=%huu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b=, m=%hu, k=%hu, n=%hu, init_val_controlC=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b, m=%hu, k=%hu, n=%hu, unitFlag=%hhu, kDirectionAlign=%hhu, cmatrixSource=%hhu, cmatrixInitVal=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cc__ %s*)c, (__ca__ %s*)a, (__cb__ %s*)b, bias=%llu, m=%hu, k=%hu, n=%hu, unitFlag=%hhu, kDirectionAlign=%hhu, cmatrixSource=%hhu, cmatrixInitVal=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__%s__ %s*)dst, repeat=%I64d, value=%s); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ca__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__cb__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__cbuf__ %s*)src, posWk=%hhu, posHk=%hhu, firstWi=%hu, firstHi=%hu, idxChannel=%hu, strideW=%hhu, strideH=%hhu, Wk=%hhu, Hk=%hhu, dilationW=%hhu, dilationH=%hhu, dstJmpOffset=%hhu, enRepeat=%hhu, nRepeat=%hhu, c=%hhu); false && "dst pos unsupported."L0_SET_VALUEMAX_LOAD3D_L1 >= intriParams.l1HintriParams.l1H >= MIN_LOAD3D_L1MAX_LOAD3D_L1 >= intriParams.l1WintriParams.l1W >= MIN_LOAD3D_L1MAX_LOAD3D_C1_IDX >= intriParams.c1IndexintriParams.leftTopW >= MIN_LOAD3D_LEFT_TOPintriParams.leftTopH >= MIN_LOAD3D_LEFT_TOPMAX_LOAD3D_STRIDE >= intriParams.strideWintriParams.strideW >= MIN_LOAD3D_STRIDEMAX_LOAD3D_STRIDE >= intriParams.strideHintriParams.strideH >= MIN_LOAD3D_STRIDEintriParams.filterW >= MIN_LOAD3D_FILTERintriParams.filterH >= MIN_LOAD3D_FILTERintriParams.dilationFilterW >= MIN_LOAD3D_DILATION_FILTERintriParams.dilationFilterH >= MIN_LOAD3D_DILATION_FILTERMAX_LOAD3D_JUMP_STRIDE >= intriParams.jumpStrideintriParams.jumpStride >= MIN_LOAD3D_JUMP_STRIDEMAX_LOAD3D_REPEAT_MODE >= intriParams.repeatModeintriParams.repeatTime >= MIN_LOAD3D_REPEAT_TIMESMAX_LOAD3D_CSIZE >= intriParams.cSizeFMATRIXL1_3D_SIZEPADDINGset_l3d_rptset_paddingset_paddingset_paddingset_paddingset_paddingset_paddingset_paddingset_paddingcreate_cbuf_matrixcreate_cbuf_matrixcreate_cb_matrixcreate_cb_matrixvoid AscendC::CreateCaCbL1MatrixPv(AscendC::Hardware, L0_T*, int64_t, S_T) [with L0_T = void; S_T = float16::Fp16T; int64_t = long int]create_ca_matrixcreate_ca_matrixbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccbroadcast_ub_to_ccmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadmadimg2col_cbuf_to_ubimg2col_cbuf_to_ubimg2col_cbuf_to_ubimg2col_cbuf_to_ubimg2col_cbuf_to_ubimg2col_cbuf_to_ubimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_cbimg2col_cbuf_to_cbvoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = float16::Fp16T]img2col_cbuf_to_caimg2col_cbuf_to_cavoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = signed char]img2col_cbuf_to_caimg2col_cbuf_to_cavoid AscendC::CheckLoad3dV1Param(const AscendC::LoadData3DParamsV1&) [with T = unsigned char]img2col_cbuf_to_caimg2col_cbuf_to_caload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbufload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_cbload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_gm_to_caload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_cbload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_caload_cbuf_to_cavoid AscendC::Load2dv1PvImpl(void*, void*, const AscendC::UnaryPvParams&, const AscendC::LoadData2DParams&)void AscendC::CheckBroadCastParam(uint8_t, uint8_t)void AscendC::CheckLoadImageToL1Params(const AscendC::LoadImageToL1Params&)void AscendC::CheckLoad2dParam(const AscendC::LoadData2DParams&)kernel_operator_proposal_debug.cpprepeat >= AscendC::MIN_REPEAT_TIMESintriParams.repeatTimes >= AscendC::MIN_SORT_REPEAT_TIMES[%s:%d] block_idx: %d, core_type: %s %d %s: dstLen=%d, readMemAddr=0x%X, writeMemAddr0=0x%X, writeMemAddr1=0x%X, writeMemAddr2=0x%X, writeMemAddr3=0x%X [%s:%d] block_idx: %d, core_type: %s %d %s: repeat mode is not valid AscendC::MAX_REPEAT_TIMES >= repeat[%s:%d] block_idx: %d, core_type: %s %d %s: %s, dstLen=%d, srcLen=%d, dataType=%d, xmInstr=0x%X, repeat=%hhu, modeNumber=%hu vbitsortAscendC::MAX_SORT_ELE_LEN >= intriParams.elementLengths[i][%s:%d] block_idx: %d, core_type: %s %d %s: vmrgsort4, dataType=%d, repeat=%hhu, params.elementLengths[0]=%hu, params.elementLengths[1]=%hu, params.elementLengths[2]=%hu, params.elementLengths[3]=%hu, params.ifExhaustedSuspension=%hu, params.validBit=%hu SORT_VALID_BIT.find(intriParams.validBit) != SORT_VALID_BIT.end()ProposalComputevoid {anonymous}::CheckRpSort16Param(int32_t)ProposalComputeMrgSort4ModelProcessMrgSort4ComputeMrgSort4ModelProcessvoid {anonymous}::CheckMrgSort4Param(const AscendC::MrgSort4Info&)MrgSort4Computekernel_operator_vec_binary_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu); vorvorvandvandvorvorvandvandvminvminvminvminvminvminvmaxvmaxvmaxvmaxvmaxvmaxvdivvdivvdivvdivvmulvmulvmulvmulvmulvmulvsubvsubvsubvsubvsubvsubvaddvaddvaddvaddvaddvaddkernel_operator_vec_binary_scalar_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, scalar=%s, repeat=%hu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); vmulsvmulsvmulsvmulsvaddsvaddsvaddsvaddsgegtleltCMPMASK0CMPMASK1kernel_operator_vec_cmpsel_debug.cpp(srcTypeSize > 0) && "Invalid src datatype size!"[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ uint8_t*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu) [ERROR][%s][%s:%d][%s][%u] dtypeSize can not be 0 [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src0, (__ubuf__ %s*)src1, repeat=%hhu, dstBlockStride=%hhu, src0BlockStride=%hhu, src1BlockStride=%hhu, dstRepeatStride=%hhu, src0RepeatStride=%hhu, src1RepeatStride=%hhu, selectMode=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); vselvselvselvselvselvselvselvselGetC0Countvcmpv_nevcmpv_nevcmpv_nevcmpv_nevcmpv_ltvcmpv_ltvcmpv_ltvcmpv_ltvcmpv_levcmpv_levcmpv_levcmpv_levcmpv_gtvcmpv_gtvcmpv_gtvcmpv_gtvcmpv_gevcmpv_gevcmpv_gevcmpv_gevcmpv_eqvcmpv_eqvcmpv_eqvcmpv_eqvoid AscendC::VcmpvComputeCCE(std::string, std::string, void*, void*, void*, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint8_t, uint32_t, uint32_t)bf16kernel_operator_vec_duplicate_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, scalar=%s, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); vector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupvector_dupkernel_operator_vec_reduce_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: dst, src, dstLen=%d, srcLen=%d, dstScope=%d, srcScope=%d,dataType=%u, iMASK0=0x%llX, iMASK1=0x%llX, readMemAddr=0x%llX, riteMemAddr=0x%llX, xmInstr=0x%llX, repeat=%hhu,dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu [%s:%d] block_idx: %d, core_type: %s %d %s: dst, src, dstLen=%d, srcLen=%d, dstScope=%d, srcScope=%d, dataType=%d, iMASK0=0x%llX, iMASK1=0x%llX, readMemAddr=0x%llX, writeMemAddr=0x%llX, xmInstr=0x%llX, repeat=%hhu, dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu, repeatStrideMode=%hu, strideSizeMode=%hu, order=%hu [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstRepStride=%hu, srcBlkStride=%hu, srcRepStride=%hu); WholeReduceSeriesC220WholeReduceSeriesC220WholeReduceSeriesWholeReduceSeriesWholeReduceComputeCCEBlockReduceSeriesBlockReduceSeriesReduceComputeCCEkernel_operator_vec_ternary_scalar_debug.cppvaxpyvaxpyvaxpyvaxpyvaxpyvaxpykernel_operator_vec_unary_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu); [%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu, repeatStrideMode=%hhu, strideSizeMode=%hhu); vabsvabsvabsvabsvnotvnotvnotvnotvnotvnotvnotvnotvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvrsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvsqrtvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvabsvlnvlnvlnvlnvlnvlnvlnvlnvexpvexpvexpvexpvexpvexpvexpvexpvrecvrecvrecvrecvrecvrecvrecvrecvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluvreluGetC0Countbasic_string::substrvdeqs162b8hvdeqs162b8lkernel_operator_vec_vconv_debug.cpp[%s:%d] block_idx: %d, core_type: %s %d %s: %s((__ubuf__ %s*)dst, (__ubuf__ %s*)src, repeat=%hhu, dstBlockStride=%hu, srcBlockStride=%hu, dstRepeatStride=%hhu, srcRepeatStride=%hhu) vconv_u82f16vconv_u82f16vconv_s82f16vconv_s82f16vconv_s322f32vconv_s322f32vconv_s162f32vconv_s162f32vconv_s162f16vconv_s162f16vconv_f322s32zvconv_f322s32zvconv_f322s32rvconv_f322s32rvconv_f322s32fvconv_f322s32fvconv_f322s32cvconv_f322s32cvconv_f322s32avconv_f322s32avconv_f322s16zvconv_f322s16zvconv_f322s16rvconv_f322s16rvconv_f322f16ovconv_f322f16ovconv_f322f16vconv_f322f16vconv_f162u8zvconv_f162u8zvconv_f162u8fvconv_f162u8fvconv_f162u8cvconv_f162u8cvconv_f162u8avconv_f162u8avconv_f162u8vconv_f162u8vconv_f162s8zvconv_f162s8zvconv_f162s8fvconv_f162s8fvconv_f162s8cvconv_f162s8cvconv_f162s8avconv_f162s8avconv_f162s8vconv_f162s8vconv_f162s32zvconv_f162s32zvconv_f162s32rvconv_f162s32rvconv_f162s32fvconv_f162s32fvconv_f162s32cvconv_f162s32cvconv_f162s32avconv_f162s32avconv_f162s16rvconv_f162s16rvconv_f162f32vconv_f162f32vconv_deqvconv_deqGetC0Count; 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